ZeptoBars - RSS feed http://zeptobars.ru/en/ Microelectronics. Die-shots. Artificial intelligence. Lasers. en-us Tue, 10 Jun 2006 04:00:00 GMT Sat, 29 Aug 15 10:18:24 +0300 webmaster@zeptobars.ru 120 10 <![CDATA[S9018 - 0.8Ghz npn BJT : weekend die-shot]]> http://zeptobars.ru/en/read/S9018-npn-bjt

Tue, 18 Aug 15 07:23:26 +0300
<![CDATA[LM319M : weekend die-shot]]> http://zeptobars.ru/en/read/LM319M-comparator Die size 2017x700 µm.

Mon, 10 Aug 15 08:09:09 +0300
<![CDATA[Mikron 1663RU1 - first Russian 90nm chip : weekend die-shot]]> http://zeptobars.ru/en/read/Mikron-1663RU1-16Mibit-SRAM-russia-zelenograd Mikron is currently the most advanced microelectronic fab in Russia, located in Zelenograd. In 2010 they have licensed 90nm technology from STMicroelectronics, and equipment setup was somewhat ready by the end of 2012. Technology transfer was hindered by very small manufacturing volume and scarce funding. Nevertheless, 1663RU1 has became their first 90nm product reached commercial customers. It's 16 Mibit SRAM chip.

There are no redundancy or ECC correction on this chip, bulk-Si technology ("civilian" technology). There are no radiation-hardening tricks implemented. This chip is apparently intended for industrial/military applications, use in space is only possible with great care.

After metalization etch. Each small square is a matrix of 64x128 bit, 16 Mibit total.

Finally, SRAM cells itself. Cell area is 1.2 µm2, which is average level for 90nm tech (best ones are 1um2). Scale is 1px=57nm.

For comparison 180nm SRAM from ST Microelectronics in the same scale (STM32F100C4T6B).

If we take a look at the piece where bits of first metal preserved, we can see that Mikron is using litho-friendly SRAM design, where critical levels only use straight lines.

Here is Andrew Zonenberg's suggestion on 6T SRAM cell layout:

Die size 5973x6418 µm.]]>
Sat, 11 Jul 15 15:53:16 +0300
<![CDATA[BFG135 - NPN 7GHz RF BJT transistor : weekend die-shot]]> http://zeptobars.ru/en/read/BFG135-NPN-7GHz-RF-BJT Die size 668x538 µm, transistor fin halfpitch - 800nm.

Closer look:
Mon, 29 Jun 15 03:07:25 +0300
<![CDATA[nRF51822 - Bluetooth LE SoC : weekend die-shot]]> http://zeptobars.ru/en/read/nRF51822-Bluetooth-LE-SoC-Cortex-M0 Die size 3833x3503 µm, ~180nm technology.

Wed, 24 Jun 15 13:02:44 +0300
<![CDATA[RGB flicker LED : weekend die-shot]]> http://zeptobars.ru/en/read/RGB-flicker-LED-state-machine-RC-oscillator
Unlike previous LED, this one is completely deterministic: diodes differ slightly only in RC oscillator frequency (~±10%). Regular structure at the lower-left side suggests that it's some sort of microcode-driven design.

Die size 553x474 µm, 1.5µm technology.

Thanks for this interesting chip to ASIP department of Gomel State University.

After metalization etch:

Wed, 03 Jun 15 03:56:55 +0300
<![CDATA[Flicker LED : weekend die-shot]]> http://zeptobars.ru/en/read/candle-flicker-LED-LFSR-RC-oscillator

This design is apparently using phase difference between 2 RC oscillators as source of random data. There are multiple designs in the wild, some other apparently based on LFSR with single oscillator. More on the topic: siliconpr0n.org, cpldcpu.wordpress.com, hackaday.com.

Die size 580x476 µm, 3µm technology.

Thanks for this interesting chip to ASIP department of Gomel State University.

After metalization etch:

Wed, 03 Jun 15 03:19:33 +0300
<![CDATA[Samsung SuperAMOLED : weekend die-shot]]> http://zeptobars.ru/en/read/Samsung-SuperAMOLED-TFT-display-Galaxy-S4-mini lucky(?) accident and new lens we managed to take much better photos of Samsung SuperAMOLED display:

October 17, 2013: Samsung's SuperAMOLED display from Galaxy S4 mini is supposed to have active matrix (i.e. control transistors are on substrate) and integrated touch sensor. Let's take a look: It seems there are at least 2 levels of barely visible interconnect (ITO?).

With few pixels glowing:

Only pixels glowing:

Half-pitch and thinnest lines are 2.5 µm. Diagonal die size is 109 mm :-)
Fri, 20 Mar 15 17:32:14 +0300
<![CDATA[Nordic NRF24L01+ - real vs fake : weekend die-shot]]> http://zeptobars.ru/en/read/Nordic-NRF24L01P-SI24R1-real-fake-copy
Genuine: This chip was extracted from "expensive" (~10$) RF module with additional RF amplifier chip:

Die size - 1876x1761 µm, 250nm technology.

Nordic logo on the die:

Compatible/counterfeit: This chip was extracted from "cheap" RF module (<1$):

Die size - 2014x1966 µm, 350nm technology.


Chip marking is similar, though not identical (genuine one on the right):

Fake chip has quite thin marking. Also, text jumps significantly from chip to chip (point stays in place).

Despite there were no functional differences reported (yet), one could expect that 350nm compatible chip will have slightly higher power consumption and slightly lower sensitivity. If only this chip was marked properly (Like SI24R1 - one of compatible chips) as compatible - that would have been totally legitimate business. But currently designers, manufacturers and end users are mis-leaded.]]>
Mon, 23 Feb 15 07:10:05 +0300
<![CDATA[Ti LMC6001 - 25 fA input current opamp : weekend die-shot]]> http://zeptobars.ru/en/read/Ti-LMC6001-25fA-input-current

Shot made by Vslav (1801ВМ1@gmail.com). ]]>
Thu, 19 Feb 15 17:10:15 +0300